In this paper a two stage CMOS compensated op-amp and its analysis is presented. In order to obtain a high dc gain, a two stage CMOS op-amp is used. The two stage op-amp consists of a op-amp as current source load using common source designed in the first stage and a common source output Beta multiplier and start up circuit stage in the second stage .In addition to the dc gain, the main advantage of this op-amp is the voltage swing .The simulated results shows a DC gain of 82dB , and it has drain current 68 μA phase margin of 585,ICMR of 785mV to 1.85V .The total power dissipation obtained from the op-amp circuit is 0.4 mW. For comparison, a similar op-amp which uses a double cascade telescopic input has been realized .And both these op-amps are designed using 180nm CMOS process.